PIT interruption by IRQ1 (EPORT)

[kedio]

@Ridgeglider I've tried clearing flag as soon as I enter the interrupt and still I'm unable to interrupt PIT with IRQ1.

@Paul Indeed this is an interesting solution, I didn't know there were other ways to trigger interrupts with external source. Unfortunately, I was given a board already design to use the IRQ pin for the high speed i/o. I can't change which pin is used...

If I can't get the IRQ1 to interrupt the PIT, an option will be to put the PIT execution in a looping task which wait on a semaphore after each loop. Then have the actual PIT post on the semaphore to start the task again. That would reduce the time passed in the PIT and the need to interrupt it. Although, that will take a bit more time so I want to be sure there is no way to make the IRQ1 interrupt the PIT because they are on the same level.

[pbreed]

Having the PIT ISR trigger a semaphore is a good solution.

How fast are the IRQ1 interrupts?

For any speed where you can actually process interrupts its unlikely that adding a jumper
between the irq1 pin and tin pin would cause an issue.

On the MOD5270 IRQ1 is on pin 43
and pins 37,36,35, or 34 could all be made into timer capture inputs...

if you need timer capture interrupt code I'll see if I can dig up one of my examples....

[kedio]

That would be cool. Also if you say it can be modified easily I will have a talk with the designer to see if it could be possible to use the timer pins!

[roland.ames]

@Ridgeglider I've tried clearing flag as soon as I enter the interrupt and still I'm unable to interrupt PIT with IRQ1.

Did you do this by

Code: Select all

INTERRUPT( PIT_routine, 0x2000 ){...}

If the INTERRUPT macro specifies 0x2100, then any interrupt of level 1 or lower is masked from interrupting PIT_routine.
If you do use 0x2000, then any interrupt of any level can interrupt PIT_routine, and I am not sure if this may cause other problems.

[Ridgeglider]

Hi roland. I thought this might be the problem, but my understanding of the SR parameter in the INTERRUPT macro is slightly different --
Given INTERRUPT( ISR_ADDR, 0x2n00) I thought the red n parameter MUST NOT BE LOWER THAN the LEVEL specified with the LEVEL parameter in the SetIntC() function. So:

(from documentation of INTERRUPT(), page 136 of the NB runtime Library Reference (C:\nburn\docs\NetBurnerRuntimeLibrary):
0x2000 - Allows all interrupts
0x2100 - Blocks all interrupts below level 2, ie ALLOWS level 1?
0x2200 - Blocks all interrupts below level 3.


However, digging a bit deeper after all these years, (and in contrast!!) see http://www.netburner.com/component/docm ... rm?Itemid=
where in Section 3 of the Example Program in the Mod5270-Interrupts.pdf it says:
use 0x2700 to mask all interrupts.
0x2500 to mask levels 1-5 etc...
0x2100 to mask level 1 */


If you're right, thank you, and maybe this will be the answer? I am surprised an IRQ of the same level but lower priority failed to work, so maybe this explains why? Paul, what's right?

[Ridgeglider]

I will try to take a look at this later today...

[kedio]

Update on the things I've tried.

@Ridgeglider as you stated yourself in an earlier post :

One other thing to be careful of is to insure that in the INTERRUPT( Addr_of_ISR, 0x2n00) call that the, 'n' must not be lower than the LEVEL specified in the corresponding SetIntc() call.

I've tried it anyway resulting in a hanging NetBurner which need to be preboot reprogrammed by serial. So setting the mask to 0x2000 doesn't seems to be the answer.

Using a semaphore method :

It does reduce the PIT executing time so does it improve the responsiveness of IRQ1 though not as good as IRQ3,5,7. Also at high frequency the semaphore seems to be post by the timer faster than the time needed for the task to reach the pend method. It means that the semaphore value grow and the task run indefinitely since the pend never hangs. So communication task and others can't run.

Is there a way to limit the semaphore value to 1?

Using DMA Timer :

Still waiting for an answer from the person in charge of the hardware to set a jumper between IRQ1 and PIN 37.