MOD54415 ADC and DAC

[jediengineer]

Does anyone know if the ADC and DAC can be run simultaneously without interruptions? I need to read 6 ADC channels, all while maintaining a constant output on the 2 DACs.. Possible?

[pbreed]

If you look at the ADC driver...
and the freescale manual, you should be able to not enable the two DAC channes in the example A/D code.
This should do what you want....

[jediengineer]

Thanks!! I think it worked!

T

[khoney]

I have the Nano54415 and used it as part of a system that provides an analog output from other circuitry. I asked the engineers to route the output (0-3.3V) to the channel 0 analog input on the Nano, just in case we might want to digitize it someday - I didn't really look into the ADC capabilities, other than knowing it was a 12-bit device.

Apparently that day might be coming, and now I'm looking at sampling data at 8KHz, but in reading the Coldfire manual I'm not seeing a way to sample at such a low rate. The lowest conversion rate discussed in the ADC section is 600KHz. I don't see how the sample rate is separated from the conversion rate, e.g doing a channel scan at a high rate, but having a much lower rate between scans. Another part of the manual talks about DMA, or McPWM used with the ADC, but it's not apparent to me how all of this plays together, and I couldn't find any supporting material anywhere. I don't have any spare I/O on the Nano board connections, so whatever timing could be made would have to be internal to the module. Has anyone been successful at producing a low sample rate for the ADC? I'll be needing to take the 8KHz samples and write them to the SD card. I was hoping to just write the samples to a large circular RAM buffer that I can pull from to write to disk.

[Ridgeglider]

I have not tried this on the nano, but quite a while ago on the 5213 i used a periodic interrupt using something like the PIT or DMA timer to trigger an AD conversion. That conversion was setup to fire another end-of-conversion IRQ that in turn wrote the data to a buffer. I used two buffers. When one was full I pointed the logging to the other buffer then processed the full bufffer. On the nano, that alternating process would be an easy way to do large (ie efficient) block writes to SD. I'm guessing that the clock you were referring to was maybe the sample clock for each bit of the 12 bit conversion, not the full sample to sample clock. Not sure yet as I have not fooled with nano ADC.

[dciliske]

Looking through the ADC chapter in the manual, my recommendation is as follows:

1. Run the ADC at 600kHz in loop mode.
2. Setup a DMA timer at 8kHz to transfer out of the intermediate buffer and into the primary buffer and then trigger an interrupt when the buffer is full. See below for approaches to setting up the dma to switch between the two buffers.
3. When dma channel interrupt fires, process the filled buffer.

To switch between the buffers, there's two ways to do it.
1. Allocate a double sized buffer and have the dma channel trigger an interrupt when the buffer is half filled and fully filled. Then have the channel reset the destination to the buffer's start and continue.
2. Allocate n buffers. Have the dma channel an interrupt when the buffer is fully filled only and have the channel in Scatter Gather mode. This will tell the channel to load in a new configuration which you can use to point to an arbitrarily different location in memory for other buffers.

Also, this might make for a good example to write...

-Dan

[dciliske]

Followup: I've got an example application (almost) finished; I just need to test it a bit to confirm that the A/D is working like I think it is. On that note... do be careful how you hook up the A/D on the modules. I guess I'm no longer in the realm of software after I managed to burnout two boards in two days

Turns out 3.3 volt processors don't like a 9 volt AC signal or hooking up Vcc to Analog Reference Ground with Vground hooked up to A/D in. Who knew...

-Dan

[jediengineer]

Its in the datasheet...lol 4V max I believe.

[dciliske]

Yup, I just accidently cranked up the signal generator near max (9V) when I had thought I had turned it down instead...

[dciliske]

Cleaning up the code now, but here's an output from this experiment.

Strange, but my initial approaches at trying to be fast can't let me stream to a wav file at 8KHz; 4KHz seems doable, but has some potential artifacts.