We have an application that uses the three 5234 UARTs plus two more via eTPU. There are many thousands of interrupts per second. In some of our testing, bytes are lost. The eTPU UARTs appear to generate an interrupt per byte. What would it take to get our eTPU to use DMA in order to reduce the number of interrupts to the CPU?
There is one DMA controller accessible to the eTPU on the 5234. I have crawled through some eTPU documentation but haven't found an example exploiting this. I have in mind a solution where the eTPU buffers some number of bytes and interrupts the CPU only to set up a DMA transfer and handle transfer completion or something like that. According to the 5234 reference manual, DMA also has a back door to SRAM, which seems like a good place to buffer the data to reduce memory bus contention. I have been able to use DMA with a hardware UART (one controller each for Rx and Tx). There are two more DMA controllers available and I am hoping to use at least one more. Any comments on this?