How to make watchdog timer running? shows random behaviour.

[savaliya_ambani]

Hi, all

I am using the NNDK MOD5282. On this, i am trying to implement the watchdog timer module since few days, but its confusing me every time.

1)whether to enable/disable the watchdog timer when starting the mod5282 board? i.e. from Setup Options , by pressing the "W" .We can enable/disable it.
if i enable it is resetting the board every 5 sec.

2)Which watchdog timer to configure? (1)CORE WATCHDOG Timer (chapter no. 8 -System conrtol module) or (2) Watchdog timer ( chapter no. 18-watchdog timer module) from the mcf 5282.

3)I have tried using the core watchdog timer in the following way. i want to run watchdog in such a way that, when it timer out it will got to the ISR. (vector no-45).

INTERRUPT(MY_ISR,0X2100)
{
PRINTF("MY_ISR\n");
sim.scm.cwcr=0x00 //stop watchdog
sim.scm.cscr=0x55;
sim.scm.cwsr=0xaa;
sim.scm.cwcr=c5; //start watchdog and soft reset enable
}

but this is not working , i.e continuosly running in ISR.
when i have tried to check the cause of coming in ISR then, it is showing different .
1) sim.reset.rsr=0x04 // i.e. due to watchdog flag interrupr;
2)sim.scm.crsr=0x80 //i.e. reset due to external reset .
now, what should i guess from this two?

*****if possible kindly provide me with some configuration code and isr for the watchdog*****

kindly reply urgently.
Thanks to all.

[hendrixj]

I don't know much about your specific problem, but don't try to print from an ISR. It won't work. If your board has a pin tied to an LED, turn the LED on to indicate that you've reached it.

[lgitlitz]

Hi,

The watchdog you should be using is the stand alone watchdog peripheral, not the core watchdog timer. The core watchdog timer is not really a safe watchdog. It relies on code, your ISR, to reset the processor. If your code runs stray then it is possible that this ISR gets overwritten and then the processor will not reset.

By default the watchdog module is enabled on this processor. The WCR register that controls this watchdog is a write once register so it is locked until reset after the first write. When you disable the watchdog in the monitor then we write a 0 to this register and the watchdog can no longer be enabled. When you enable the watchdog in monitor we write nothing to the register and you should re-enable the watchdog to lock this register to prevent the watchdog from being disabled.

You must continually service the watchdog or the processor will automatically reset. There is a common watchdog service routine for all the NetBurner products in the following example:
C:\Nburn\examples\AutoUpdateFeatures
This example also shows you how to tie you watchdog service routine to the flash writing functions in the NNDK. This will prevent the watchdog from resetting the processor during flash writes, such as autoupdates.

-Larry

[savaliya_ambani]

Thanks for the reply,

Now, the next thing is that my watchdog module is running OK , but not the way i wish. I am using the Watchdog timer module (chapter-18 , MCF5282.pdf) and i have to enable it through the register SIM.SCM.CWCR=0X80 (chapter-8,mcf5282.pdf). If i dont write into this register than it is not running.

see,just below code i have written:
Main()
{
SetIntC(0,&wdt_isr,8,3,3); //vector no. 8 ,SWT flag
sim.scm.cwcr=0x80; //enable watchdog
sim.wtm.wmr=0x8000 ; //reset at 4 seconds
while(1)
{ ; } //keeping the controller busy
}
INTERRUPT(wdt_isr,0x2300) //service routine here
{
pritnf("just to check ,whether taking the interrupt or not?\n");
sim.wtm.wcr=0x5555;
sim.wtm.wcr=0xaaaa;
}


Now ,when i run this code with watchdog enable, it is continuosly running into ISR,because i cant find any thing to CLEAR this SWT flag does any one know how can i clear this flag?

[lgitlitz]

Hi,
I made an error in my last response. I said that the core watchdog can not directly reset the processor. On the MCF5282 it can but on the MCF5270/34 it can not, this feature was removed. Either way this is not a safe watchdog timer since it can be disabled by simply writing a 0 to its control register. The other watchdog will be much safer since a reset is required to disable it.

You first enable the "core wdt" with the shortest timeout and configuring it to interrupt instead of reset the processor. You then configure the modulus register of the standard watchdog timer peripheral, this has no affect on the core watchdog you previously enabled. Then the interrupt for the core watchdog peripheral will clear the count for the standard watchdog timer peripheral? The interrupt flag for the core watchdog can be cleared by writing a 1 to bit 0 of the cwcr.

I am a little confused about your code, what are you trying to accomplish with the watchdog? It looks like you are mixing up the two different watchdog timers. Using one watchdog to clear the other watchdog seems like you are probably mixing things up.
I highly recommend that you stay away from the core watchdog peripheral. If you need a real watchdog that resets the processor then use the standard watchdog timer peripheral, no interrupts required. If you need a timer to trigger an interrupt then you should use either the PIT, GPT or DMA timer peripherals.

-Larry

-Larry

[savaliya_ambani]

Dear Sir,

i just want to write a code for the watchdog which can service the controller at 1.2 second and i also want to check that if within this time i do not service it ,where in the ISR it can come ?

my goal is so simple, i want to get the feel of watchdog running. so how can i check in ISR when watchdog time.let say for example using some iprintf("time out occur\n");

[leetehui]

I also met problem to set watchdog timer timeout. How to set the timeout to 1.2 seconds?
sim.wtm.wmr = 18000; is not working