MOD5441X configuring CSx & R/~W
Posted: Fri Aug 28, 2015 6:04 am
I have a new design where I need to tie in an external part to the address and data bus.
I used CS1 & R/~W line along with a 8-bit buffer on the data bus.
I have the prototype here and I can see with the scope that the CS1 & R/~W are doing their job. I am seeing the correct address and data being applied during the CS1 low signal time.
Yet I found out something I had not expected. The R/~W line does not toggle during the CS1 low time frame. For a write the R/~W line is low before, during and after the CS1 low pulse.
For a read the R/~W line is high before, during and after the CS1 low pulse. I need to get the R/~W line to toggle inside the CS1 low pulse time. Much like this attachment shows.
I thought i could use use another pin with some logic to achieve this goal, say the BE0 pin, but the BE0 has the same timing as the CS1 pin so that is a no go.
Anyone have any ideas how to make the R/~W pin do its thing inside the CS1 time frame ?
I used CS1 & R/~W line along with a 8-bit buffer on the data bus.
I have the prototype here and I can see with the scope that the CS1 & R/~W are doing their job. I am seeing the correct address and data being applied during the CS1 low signal time.
Yet I found out something I had not expected. The R/~W line does not toggle during the CS1 low time frame. For a write the R/~W line is low before, during and after the CS1 low pulse.
For a read the R/~W line is high before, during and after the CS1 low pulse. I need to get the R/~W line to toggle inside the CS1 low pulse time. Much like this attachment shows.
I thought i could use use another pin with some logic to achieve this goal, say the BE0 pin, but the BE0 has the same timing as the CS1 pin so that is a no go.
Anyone have any ideas how to make the R/~W pin do its thing inside the CS1 time frame ?