MOD54415 ADC and DAC

[dciliske]

I've got the example up now. It's currently only tested for the MOD54415, but I'm fairly certain it should just work on the NANO. I'll test that part tomorrow.

The example app: http://forum.embeddedethernet.com/viewt ... f=7&t=1599

[Edit] It turns out I forgot that the MOD5441X uses a different filesystem style for initializing SD cards... I've uploaded a working version for the nano as well.

[khoney]

I ended up using the HiResTImer to generate an 8khz interrupt, and have been able to write a wav file to the SD card in linear PCM format. I may not have to mess with DMA, but I will take a look at your example.

Funny about blowing up the A/D. We wired a signal into channel 0, but somehow left the VDDA_ADC_DAC off the board

[dciliske]

You should be able to tie V_cc to V_ref and V_gnd to V_agnd internally on the processor (I think this is the default). It's a register setting on ADC module.

[khoney]

Dan - thanks for that info. ANd thanks for the example - guess I should have procrastinated!

On a related note, I was trying to use some assembly code to do the 32-bit byte swapping for endianness using the "BYTEREV.L D0" instruction, but I'm getting an error stating "invalid instruction for this architecture" (I'm using the 54415). I know it's valid, at leas according to Freescale manual. Is there some compiler flag I need to set to use it?

[pbreed]

This is a cpu flags problem to the assembler problem...

from a make file add

CPUFLAG=mcpu=54455

under elcipse you need to modify the project settings in c/c++ settings -> gnuc and c++ compiler
CPUFLAG=mcpu=54455

The instructions are
byterev %d0
byterev.l %d0

[khoney]

I went into those sections, but the place where mcpu is shown (All options) is read-only, and mcpu is set to 5206e. This is under Tool Settings tab. Where do I go to be able to modify these?

[khoney]

You should be able to tie V_cc to V_ref and V_gnd to V_agnd internally on the processor (I think this is the default). It's a register setting on ADC module.

Dan - I took a look into this, and I don't see that there's a way to run the A/D without providing a voltage on the NANO board VDDA_DAC_ADC pin. On the Nano schematic, this pin is tied to both the VDDA_ADC pin (H4) and the VDDA_DAC_ADC pin (J4) on the processor. I do not see anywhere in the MCF54415 manual where a supply voltage for the ADC can be internally generated. One thing you can do is set internal vs external voltage references, where a voltage reference can be either the analog supply voltage (VDDA_ADC) or one of the analog input pins. However it still appears to me that the analog supply voltage must be provided to the Nano board. Could you please confirm this? If it is the case, I don't want anyone thinking that can leave that pin disconnected and still use the ADC. The NANO54415 data sheet describes this connection as a voltage reference, but it appears to me to actually be both a supply AND reference voltage. This is a bit confusing - could you please check into this and provide additional insight? I don't want to steer anyone wrong.

[khoney]

This is a cpu flags problem to the assembler problem...

from a make file add

CPUFLAG=mcpu=54455

under elcipse you need to modify the project settings in c/c++ settings -> gnuc and c++ compiler
CPUFLAG=mcpu=54455

The instructions are
byterev %d0
byterev.l %d0

I still can't find the place where I can actually modify this. Every place I've tried is either read-only or has no effect. If using Eclipse, where exactly can I alter this parameter?

[dciliske]

Khoney- Here's the section from the reference manual on the "Calibration Register (ADC_CAL)" for the ADC module, section 29.4.13:

Code: Select all

15 VREFH1 - VREFH source 1. Selects the source of the VREFH reference for all conversions in converter 1.
    0 Internal VDDA
    1 ADC_IN4

14 VREFL1 - VREFLO source 1. Selects the source of the VREFLO reference for all conversions in converter 1.
    0 Internal VSSA
    1 ADC_IN5

13 VREFH0 - VREFH source 0. Selects the source of the VREFH reference for all conversions in converter 0.
    0 Internal VDDA
    1 ADC_IN0

12 VREFL0 - VREFLO source 0. Selects the source of the VREFLO reference for all conversions in converter 0.
    0 Internal VSSA
    1 ADC_IN1

11–2 Reserved, must be cleared.

1 DAC1 - DAC1 alternate source 1. Selects the source of the ADCB3 input as DAC1 output.
    0 Normal operation
    1 ADC_IN7 input is replaced with DAC1 output

0 DAC0 - DAC0 alternate source 0. Selects the source of the ADCA3 input as DAC0 output.
    0 Normal operation
    1 ADC_IN3 input is replaced with DAC0 output

There is also this note from the External Signal Description, section 29.3:

Dedicated power supply pins to reduce noise coupling and to improve accuracy. The power provided to these pins is suggested to come from a low noise filtered source. Connect uncoupling capacitors between ADC_VDD and ADC_VSS. ADC_VSS is shared among the analog and digital circuitry.
Note: On this device, the ADC reference voltages are internally connected to this supply.

Finally, if you look at section 29.5.3.1, "Normal Mode Operation", there's this note on the actual A/D operation:

Single-ended mode (CHNCFG = 0) — The input mux of the ADC selects one of the four analog inputs and directs it to the plus terminal of the A/D core. The minus terminal of the A/D core is connected to the VREFLO reference during this mode. The ADC measures the voltage of the selected analog input and compares it against the (VREFH – VREFLO) reference voltage range.

Is this a convincing argument or am I missing something? I'm a little new to this area of the part myself, so it's possible I am.

[khoney]

Is this a convincing argument or am I missing something? I'm a little new to this area of the part myself, so it's possible I am.

Dan,
If you can remove JP8 from a Netburner NANO-ADPT-100CR and still produce valid A/D readings, I'll be a true believer

Seriously, I was not getting valid readings using the SimpleAD.cpp example code until I tied a supply voltage to pin 7 of the Nano module. I had already read all of the material from the manual that you referenced, and nothing in it leads me to believe that there is a way for the ADC to have an internal supply/reference voltage. What it does make clear is that the normal reference voltage is the analog supply voltage, unless you use the calibration register to feed in alternate high/low references on two other analog input channels. So it is possible to have a different reference than a supply (only by using analog inputs as reference sources), but I don't see a way to internally route any other VDD to VDDA_ADC.

Perhaps I am misinterpreting all of this, but the fact that there is a jumper on the carrier board (and a review of the schematics for both the carrier and Nano module) leads me to believe otherwise. Also, if a supply voltage is required on that pin, the Nano datasheet should be modified to reflect that in order to avoid confusion, because the Coldfire manual is definitely clear as mud about this.

Kevin